The present invention relates to a mold die and to a method of manufacture of a semiconductor device using the mold die; and, more particularly, the invention relates to a technology in which a die is used effectively for sealing a semiconductor chip, which is mounted on a wiring board via an elastic material and an opening of the wiring board, by transfer mold processing.
One example of conventional semiconductor devices having a form referred to as a BGA (Ball Grid Array) includes a semiconductor chip, an interposer (wiring board) having an insulating substrate on which a conductive pattern is provided, and an elastic material (elastomer) disposed therebetween for providing stress relaxation. The semiconductor device hereafter referred to includes the above-described elastic material, unless otherwise specified.
The above-described semiconductor device includes, for example as shown in FIG. 9, an opening 4 in the interposer, which includes an insulating substrate 101 on which the conductive pattern 102 is provided, and in the elastic material 2. The conductive pattern 102 and an external electrode 301 of the semiconductor chip 3 are electrically connected by way of the opening 4.
In addition to the opening 4, the described insulating substrate 101 also includes an opening (not shown) for forming an external connecting terminal 6. The opening 4 over which the conductive pattern 102 and the external electrode 301 of the semiconductor chip 3 are connected is hereafter referred to as a bonding opening. The opening for forming the external connecting terminal 6 is hereafter referred to as an external terminal opening.
In the above-described semiconductor device, an insulating resin 5 seals the periphery of the semiconductor chip 3, for example as shown in FIG. 9. The insulating resin 5 also seals the bonding opening 4. The periphery of the semiconductor chip 3 and the bonding opening 4 may be sealed, for example, by transfer mold processing.
The above-described transfer mold processing is carried out, for example, as shown in FIG. 10, by sandwiching the interposer (insulating substrate 101) bearing the semiconductor chip 3 between a first die (hereafter referred to as a top die) 7 having a recess 7A of predetermined form and a second flat die (hereafter referred to as a bottom die) 8, by causing the insulating resin 5 to flow into the resulting space formed therebetween, and by curing the resin 5 (see for example Japanese application patent laid-open publication No. 2002-353361).
Semiconductor devices in a similar form to the above-described semiconductor device include a semiconductor device in which the conductive pattern 102 and the external electrode 301 of the semiconductor chip 3 are electrically connected via a bonding wire. The semiconductor device using a bonding wire may be transfer molded using a groove (recess) provided on a portion overlapping the bonding opening 4 of the interposer to ensure the sealing of the loop of the bonding wire (see for example Japanese application patent laid-open publication No. 2000-058711 (FIG. 6)).